[Weekly Review] 2020/12/14-2020/12/20
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SingularityKChen
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- WeeklyReview 81
2020/12/14-12/20
This week, I established the environment for Pulpissimo and integrated one former design with one of its module. Next week, we'll try to integrate them into the SoC.
We wasted a lot of time on establishing the environment due to the bad instructions under different repositories. Therefore, I write a new instruction to establish the environment for Pulpissimo.
When we were debugging the integration of our former module and one of its small module, I found some basic tricky things for debugging.
- Check the clock. At the beginning, the memory module could not be written, minutes later, I found that at that time, the clock was low. So next time, check the clock firstly.
- Check the reset signal. In my project, the reset is active high while in the Pulpissimo, it's active low. Therefore, the reset signal was always high in my module, means, all the registers are resetting all the time. So next time, check the reset secondly.
- Check the clock when resetting. In most case, registers are reset to false. However, I reset some registers to true in my module. The problem is, in the Pulpissimo testbench, the clock is inactive when resetting.
Also, we began to working on the design and implementations of another project in a team. However, I forgot to told the coding styles to my group members.
I published these posts this week:
- Classifying Algorithms Based On Task Dependences: categories of algorithm by task dependences.
- Algorithm DG (Directed Graph): using directed graph to draw the data flow of the software algorithm and then we can optimize it and design the hardware architecture.
- Configure Sublime Text for Verilog: Configure Sublime Text for writing Verilog and SystemVerilog.
- Configure and Run Pulpissimo: From install gcc and SDK to Run simple runtime examples for Pulpissimo.