[Weekly Review] 2021/11/15-2021/11/21
2021/11/15-2021/11/21
I began to try and learn Fusion Compiler two weeks ago, hoping to get to know the link between RTL and the real circuits and gates, as long as how to make floorplan.
I finished my QE reports last week, and will try to submit it to the system next week.
I also tried to use WaveRender to draw the waveform of the controllers last week, which is useful but very time-consumption. Meanwhile, I'm implementing the controllers.
I got to know that from Chisel 3.5, the Module
is MultiIOModule
. To build a basic factory module, we can declare the common module using one IO
while each instance could use their own special IO
s.