[Glean] Computer Architectures for Next Generation Applications

Published: January 18, 2021 by SingularityKChen (Last updated: January 18, 2021 )

• Categories:
• Glean 53

• Tags:
• Agile 3
• Bell 1
• DSA 2
• Makimoto 1
• Moore 1
• Parallelism 1

• Computer Architectures for Next Generation Applications
  • Three Laws: Moore's law, Makimoto's wave, Bell's law
    • Moore's law
    • Makimoto's wave
    • Bell's law
  • Design Methods and Optimzations for DSA
    • Performance and power
    • Fragmented requirements
    • History of CPU

Computer Architectures for Next Generation Applications¹

Three Laws: Moore's law, Makimoto's wave, Bell's law

Moore's law

Moore's law is not end, but slower.

Not all the transistors are used wisely². They can speed up the performance of one Python program by $62,806\times$ via fully utilizing CPU.

From the software engineers' aspect, this huge performance gap means that most of the engineers can not full utilize CPU.

One possible method can be utilizing domain specific architectures. This is one method to implement the algorithms into hardware directly instead of using software programs, which can be orders of magnitude speeds up.

Makimoto's wave

In the early 1990s, Dr Tsugio Makimoto made an observation while working as Sony’s chief technology officer. He had observed that electronics cycled between custom solutions and programmable ones approximately every ten years.³

Things behind this law is the trade off between power and performance. As for CPU, its the balance between general purpose architecture and DSA, which represent a higher development efficient and a better performance respectively.

Bell's law

Roughly every decade a new, lower priced computer class forms based on a new programming platform, network, and interface resulting in new usage and the establishment of a new industry.

Coming into the AIoT aging, the demanding of processors will burst while the requirements are also fragmented. This can be a challenge to current design methodologies and industry to fulfill fragmented requirements.¹

Design Methods and Optimzations for DSA

Performance and power

Reduce data movements

• custom instructions can reduce the number of instructions and optimize some operations
• utilize cache. replacement, prefetch, compress, schedule.

Reduce data precious

Mixed precious data computation.

May use Posit data format to mix the data precious.

Improve parallelism

Instruction Level Parallelism(ILP), Memory Level Parallelism(MLP)

Superscalar, Multithreading, SIMD, STMD, Systolic Array

Fragmented requirements

• agile design

History of CPU

The state changing of CPU is driven by the software program. Therefore, the optimization in the CPU level is finding the common behaviors in the programs and accelerate them, which requires the knowledge in software programming, operation system, compiler and computer architecture.

1. "多核之后，CPU的发展方向是什么 - 知乎", https://www.zhihu.com/question/20809971/answer/1678502542 (Accessed: Jan. 18, 2021.). ↩ ↩²

2. C. E. Leiserson et al., “There’s plenty of room at the Top: What will drive computer performance after Moore’s law?,” Science, vol. 368, no. 6495, Jun. 2020, doi: 10.1126/science.aam9744. ↩

3. “Makimoto’s Wave,” Semiconductor Engineering. https://semiengineering.com/knowledge_centers/standards-laws/laws/makimotos-wave/ (accessed Jan. 18, 2021). ↩